2023

1. Himangshu Deka, Arun Kumar Sunaniya, Pratima Agarwal,: "“Simulation studies on MoS2 (n)/a-Si:H (i)/c-Si (p)/MoO3 heterojunction solar cells using one sided short diode approximation”" Solar Energy, Elsevier, vol. 263, 1-9 October 2023 https://doi.org/10.1016/j.solener.2023.111943 SCIE (6.0),
2. Dipjyoti Das, Sudipta Chakraborty and Asim K. Naskar: "Controller design on a new 2DOF PID structure for different processes having integrating nature for both the step and ramp type of signals" International Journal of Systems Science 55(15), 1423-1450 2023 https://doi.org/10.1080/00207721.2023.2177903 SCIE (4.9),

2022

1. Moudgollya, Rhittwikraj, Arun Kumar Sunaniya, Abhishek Midya, and Jayasree Chakraborty: "A multi features based background modeling approach for moving object detection" Optik 260 (2022): 168980. 260 June 2022 https://doi.org/10.1016/j.ijleo.2022.168980 SCIE (3.1),
2. Sudipta Chakraborty: "A new analytical approach for phase-margin specification-based target-loop selection for different class of dead-time processes" International Journal of Automation and Control 16(1), 125-135 2022 https://doi.org/10.1504/IJAAC.2022.119424 SCIE (1.3),
3. Subhajit Das and A. K. Sunaniya: "FPGA Implementation of High-fidelity Hybrid Reversible Watermarking Algorithm" Elsevier, Journal of Microprocessor and Microsystems 89 March 2022 https://doi.org/10.1016/j.micpro.2022.104442 SCIE (1.9),
4. Deka, Himangshu, Arun Kumar Sunaniya, and Pratima Agarwal: "Design and Simulation of Highly Efficient One-Sided Short PIN Diode Silicon Heterojunction Solar Cell" IEEE Journal of Photovoltaics 12(1), 204-212 January 2022 10.1109/JPHOTOV.2021.3116016 SCIE (2.5),

2020

1. Sudipta Chakraborty, Asim K. Naskar and Sandip Ghosh: "Inverse plant model and frequency loop shaping-based PID controller design for processes with time-delay" International Journal of Automation and Control 14(4), 399-422 May 2020 https://doi.org/10.1504/IJAAC.2020.108273 SCIE (1.3),

2017

1. Sudipta Chakraborty, Sandip Ghosh, Asim Kumar Naskar: "All-PD control of pure Integrating Plus Time-Delay processes with gain and phase-margin specifications" ISA Transactions 68 203-211 2017 https://doi.org/10.1016/j.isatra.2017.01.031 SCIE (6.3),
2. Sudipta Chakraborty, Sandip Ghosh, Asim Kumar Naskar: "I–PD controller for integrating plus time-delay processes" IET Control Theory & Applications 11 3137-3145 2017 https://doi.org/10.1049/iet-cta.2017.0112 SCIE (2.2),